PD Interview Questions - How does DFT logic affect PD ?

1. How does mbist logic affect placement ? Will knowing the algorithms used to assign controllers help in floorplan ? How does scan chain affect PD ?

MBIST (Memory built-in self-test) logic is inserted to test the memories. It contains MBIST processor & wrapper around the memories. MBIST processor controls the wrapper & generates various control signals during the memory testing. A single block may have multiple processors depending on the number of memories, memory size, power and memory placement. Memory placed nearby are grouped together & controlled by a single processor. 
Memory placement information needs to be given to the DFT team in form of DEF & floorplan snapshot (optional). 
If memories are not grouped properly according to their physical location i.e memories under same processors are sitting far apart. This will lead to MBIST logic spreading. 
This may have impact on MBIST timing due to long paths or increase in congestion due to lots of criss-cross.

2. what you mean by Scan Chain Reordering?

click on link for more information

http://vlsibasic.blogspot.in/2014/09/scan-chain-reordering.html