VLSI Basic

it's the site made for the ASIC physical design engineer for clear the every VLSI basics of Physical design. you can comments for the query, we will come with nice explanation to you

Tuesday, 24 January 2017

VIRTUAL CLOCK

- A virtual clock can be defined as a clock without any source or in other words a virtual clock is a clock that has been defined, but has...

Friday, 6 January 2017

TCD (Test-key Critical Dimension) Cell

For technology nodes below 40nm, there are few important rules that must be considered while creating the floorplan...

Sunday, 31 January 2016

DRC

DRC is nothing but Design Rule Check. After routing, In Physical Verification steps we do DRC clean up. It means it should follows all fou...

Tuesday, 5 January 2016

Electrical Rules Checking (ERC)

ERC Rules check for things such as: Floating gates. Wrong transistor connections (Source and Drain connected together for instance). ...

Layout vs Schematic Verification (LVS)

• Verify that physical implementation is consistent with the above gate and RTL level design representations • Errors may...

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